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Certificate Program
Course Description and Prerequisites:
Embedded system design fundamentals as well as reconfigurable logic design and implementation using a hardware description language are covered in this accelerated course. Experiencing various micro-controllers and microprocessors, participants discover hardware, software and firmware design trade-offs, tool chains, and best practices in current embedded systems development. Real-time operating system topics will be considered to further emphasize embedded hardware-software impacts. Numerous hands-on laboratory projects are provided to reinforce lecture concepts. A final project will integrate course topics into an embedded system design based on an intellectual property (IP) core implemented in a reconfigurable logic package and driven by application code loaded from either the development platform or on-board firmware.
Participants should be familiar with analog and digital design methods, computer architecture and structured/procedural programming techniques.
Topics include but are not limited to:
- Introduction to Embedded Systems, Selection and Partitioning Process
- Embedded Development Environment, Debugging and Testing
- Embedded C Programming Fundamentals
- Advanced Embedded C Programming
- Motorolla MCF5282 ColdFire Microprocessor
- ColdFire - Open TCP Examples
- Memory Systems, Basic Peripherals and Analog Interfaces
- Real-time Embedded Systems Development
- Tasks and Semaphores
- Message Queues and More Kernel Objects
- Common RTOS Design Problems, Synchronization and Communication Issues
- VHDL Fundamentals
- Complex Programmable Logic Device (CPLD)
- Field-Programmable Gate Array (FPGA) Intellectual Property (IP)
Embedded Literature Summary and Critique, Microchip PIC M12F675 ,Quadros on Coldfire, OpenTCP on Coldfire, UART Applications, uC/OS-II Kernel, Xilinx ISE WebPack/Modelsim, Various Circuit Implementations in VHDL, Xilinx CoolRunner II CPLD, Xilinx Spartan-3 FPGA, PicoBlaze RISC Core in Spartan-3 FPGA
Embedded Systems & Reconfigurable Logic Design Schedule
Information & Registration:
To register or for additional information contact us by phone or email
Chicago or Wheaton 630-682-6035
reif@iit.edu